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Path: utzoo!linus!decvax!cca!ima!inmet!bhyde
From: bhyde@inmet.UUCP
Newsgroups: net.arch
Subject: Re: Risc Over-blown - (nf)
Message-ID: <579@inmet.UUCP>
Date: Fri, 9-Dec-83 22:31:42 EST
Article-I.D.: inmet.579
Posted: Fri Dec  9 22:31:42 1983
Date-Received: Sun, 11-Dec-83 01:19:37 EST
Lines: 28

#R:ncsu:-241700:inmet:2500008:000:1592
inmet!bhyde    Dec  5 11:31:00 1983

I thought the problem was to consume all those transistors that the
VLSI people have to burn.  Friends of mine build systems that have
enough transistors to implement a dozen vaxen.  Seeing as a fine grained
multiprocessor is such a pain, wouldn't a complex processor with a
compact rich format be a reasonable place to spend the chip area?

It would seem this is realy a question of where one spends the transistors.
The speed issues seem unclear to me, the time to get on and off chip
usually provides enough time for a few microcycles.  There are lots of
things to spend transistors on, memory mapping caches, instruction stream
caches, decoded instruction caches, stack caches, microcode, registers,
capablity addressing, memory, memory, memory.  Some  of these, particularly
the memory mapping cache have very high bandwidth.  If the number of transistors
was very very large, so the incremental cost of the next thousand transistors
was very low it would seem that one would always spend them on increased
complexity, reliablity, etc.  The RISC designs seem to me to be a design
who's moment in history was about 6 months long, it was that period when
the tranistors that bought a 6809 could by a 32 bit RISC instead.  Now that
we have so many more transistors the problem is how to spend them.

There arn't that many chips in the microvax implementation that is in
the market today.  There were how many, 3?, years between this stage in
the PDP-11 line and the single chip stage?  Then given that the cost
difference was only a small factor would you by a RISC or a VAX?
     ben hyde