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Path: utzoo!linus!philabs!seismo!harpo!eagle!mh3bs!mh3bc1!mdash
From: mdash@mh3bc1.UUCP
Newsgroups: net.arch
Subject: Re: risc registers vs. cache memory
Message-ID: <108@mh3bc1.UUCP>
Date: Fri, 9-Dec-83 13:42:01 EST
Article-I.D.: mh3bc1.108
Posted: Fri Dec  9 13:42:01 1983
Date-Received: Sun, 11-Dec-83 01:22:40 EST
References: <1900@fortune.UUCP>, <526@ariel.UUCP>
Organization: Bell Labs, Murray Hill
Lines: 3

PDP-10 and offspring have their registers in the address space, too.

Michael Scheer