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Path: utzoo!linus!security!genrad!decvax!decwrl!baskett
From: baskett@decwrl.UUCP (Forest Baskett)
Newsgroups: net.arch
Subject: registers vs. caches
Message-ID: <4540@decwrl.UUCP>
Date: Sun, 11-Dec-83 08:25:52 EST
Article-I.D.: decwrl.4540
Posted: Sun Dec 11 08:25:52 1983
Date-Received: Tue, 13-Dec-83 01:45:56 EST
Organization: DEC Western Research Lab, Los Altos, CA
Lines: 15

Caches are great devices and they make good supplements to registers.
There are a couple of reasons why they don't make good substitues for
registers, however.  A cache reference can be thought of as an indirect
reference.  Indirection is a powerful tool but there is a price.  For
caches, the price is usually time and additional complexity over the
direct reference to a register.  With the same technology and the same
effort, registers tend to be faster and cheaper.  A good rule of thumb
is that if a register reference takes one cycle, a cache reference will
take two.  In addition, a register address tends to be small while a
cache reference address tends to be large.  The smaller address can
have some additional speed advantages on several fronts.  And a good
compiler can do an impressive job of correctly guessing at some of the
important locality of your program.  There are a variety of ways in
which you can blur the distinction between registers and caches but
there doesn't appear to be any free lunch.