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Path: utzoo!linus!security!genrad!grkermit!masscomp!clyde!floyd!vax135!ariel!jlw
From: jlw@ariel.UUCP (J.WOOD)
Newsgroups: net.arch
Subject: Re: registers vs. caches
Message-ID: <528@ariel.UUCP>
Date: Mon, 12-Dec-83 17:47:38 EST
Article-I.D.: ariel.528
Posted: Mon Dec 12 17:47:38 1983
Date-Received: Wed, 14-Dec-83 01:16:48 EST
References: <4540@decwrl.UUCP>
Organization: AT&T-ISL, Holmdel, NJ
Lines: 17

decwrl!baskett has a good point that a cache reference is a more complex
one than  a register reference.  What I meant when I said that some
processors had put their registers in memory was that there is an
on-chip pointer to the base of an area in memory that is referenced with
a register type instruction.  The register base pointer is added to
the register number in the instruction shifted over to the left to
account for its being wider than a byte and the result is used as a
main memory reference (virtual of course).



					Joseph L. Wood, III
					AT&T Information Systems
					Laboratories, Holmdel
					(201) 834-3759
					ariel!jlw