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Path: utzoo!linus!philabs!seismo!rlgvax!cvl!louie
From: louie@cvl.UUCP (Louis A. Mamakos)
Newsgroups: net.wanted,net.dcom
Subject: Multibus communications hardware
Message-ID: <787@cvl.UUCP>
Date: Tue, 13-Dec-83 12:05:31 EST
Article-I.D.: cvl.787
Posted: Tue Dec 13 12:05:31 1983
Date-Received: Thu, 15-Dec-83 00:58:58 EST
Organization: U. of Md. Computer Vision Lab
Lines: 9

..
Does anyone know of a Multibus based synchronous I/O board?  Most
importantly, it needs to be able to do DMA to multibus memory, and NOT
generate an interrupt for each character.  It would be great if it could do
bit-synchronous HDLC or SDLC, but byte-synchronous would be OK too.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Louis A. Mamakos - Computer Science Center (Systems Staff) - Univ. of Maryland
Internet: louie@cvl.ARPA         uucp: ...!{seismo,we13,mcnc}!rlgvax!cvl!louie