Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.1 6/24/83; site fortune.UUCP
Path: utzoo!linus!security!genrad!decvax!harpo!ihnp4!fortune!lee
From: lee@fortune.UUCP
Newsgroups: net.arch
Subject: Re: 16k vs 68k vs 432 - (nf)
Message-ID: <2192@fortune.UUCP>
Date: Fri, 6-Jan-84 19:03:30 EST
Article-I.D.: fortune.2192
Posted: Fri Jan  6 19:03:30 1984
Date-Received: Sun, 8-Jan-84 01:22:26 EST
Sender: notes@fortune.UUCP
Organization: Fortune Systems, Redwood City, CA
Lines: 23

#R:mddc:-29400:fortune:16500001:000:841
fortune!lee    Jan  6 13:05:00 1984


Hi Eric,
I don't seen any problem with page sizes other than 512 for the 16k.
If you want >512, simply bring in several consecutive pages after
a page fault.  If you want <512 (who would do such a thing?), I am
sure that you can figure out which portion is the offensive one.
If the 16k MMU is smart enough to set breakpoints, traces and all
these goodies, it should be happy to report the offensive address
(Any 16k designers want to verify this?).  The MMU page table cache
is based on 512 page size, but the software needs not to be restricted
to it.
By the way, if DUAL makes a 16k board, I'll buy it. I am writing
a 16k assembler for fun anyway.

  c  / 			Ed Lee
 C. /_.  	{amd70, ihnp4, harpo}!fortune!lee

PS: These are purely my personal opinions.  Even though the company
I work for is using the 68k, I still like the 16k better.