Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 exptools 1/6/84; site ihnss.UUCP Path: utzoo!linus!philabs!seismo!harpo!eagle!mhuxl!ihnp4!ihnss!knudsen From: knudsen@ihnss.UUCP Newsgroups: net.micro,net.micro.68k,net.micro.6809 Subject: more on Motorola graphics chips Message-ID: <1891@ihnss.UUCP> Date: Wed, 25-Jan-84 19:19:30 EST Article-I.D.: ihnss.1891 Posted: Wed Jan 25 19:19:30 1984 Date-Received: Fri, 27-Jan-84 11:31:09 EST Organization: AT&T Bell Labs, Naperville, IL Lines: 8 I neglected to mention the added value of the RAM-multiplexor chip in this chipset: It doubles as a DRAM controller, doing all that RAS & CAS and Refresh dirty work. Also, its fetches for the graphics are synchronously interleaved with the CPU's accesses, in fact sneaked in while the CPU is calculating the next address to put out. Well, it does slow down a 68K a little. Also, the RAM controller decodes a lot of the address space for peripherals and other memories. Saves a lot of glue -- mike k PS: Anyone know of these chips being used yet? Maybe in the Mac?