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From: rdt@houxk.UUCP (R.TRAUBEN)
Newsgroups: net.arch
Subject: lets talk supercomputer micro-architecture!
Message-ID: <255@houxk.UUCP>
Date: Sun, 29-Apr-84 17:53:01 EDT
Article-I.D.: houxk.255
Posted: Sun Apr 29 17:53:01 1984
Date-Received: Mon, 30-Apr-84 01:05:00 EDT
Organization: AT&T Bell Labs, Holmdel NJ
Lines: 28

several publications have claimed that the japanese have caught up
and in some cases exceeded cray-2 level performance. it seems to me 
that the only way that this could have happened to their american
counterparts is that 

	1. we took them for granted.
	2. we are losing a technology driven race. (GaAs vs. Si.)
	3. we are running out of hardware speedup techniques.

i am interested in #3. beyond caching the memory hierarchy,
predicting branch directions, resolving operand precedence hazards
and bypassing them when possible: have we learned any new ways to 
optimize high-end thruput of a single user process?

i surely hope that we have advanced beyond the 360/95 and cray1
in the last 5-10 years. if not i feel that industry is stagnating.
should this be the case, american leadership in this field will
go the way of the automobile and leather shoe.

what is new in supercomputer micro-architecture?
lets either get real specific or give pointers to papers to
new techniques.

richard trauben