Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: Notesfiles; site uiuccsb.UUCP Path: utzoo!watmath!clyde!akgua!mcnc!decvax!harpo!ihnp4!inuxc!pur-ee!uiucdcs!uiuccsb!sasha From: sasha@uiuccsb.UUCP Newsgroups: net.micro Subject: Re: Re: Large Dual Ported Memories - (nf) Message-ID: <4400058@uiuccsb.UUCP> Date: Thu, 19-Apr-84 13:15:00 EST Article-I.D.: uiuccsb.4400058 Posted: Thu Apr 19 13:15:00 1984 Date-Received: Sun, 22-Apr-84 08:40:36 EST References: <618@shark.UUCP> Lines: 14 Nf-ID: #R:shark:-61800:uiuccsb:4400058:000:527 Nf-From: uiuccsb!sasha Apr 19 12:15:00 1984 #R:shark:-61800:uiuccsb:4400058:000:527 uiuccsb!sasha Apr 19 12:15:00 1984 /**** uiuccsb:net.micro / shark!mikezi / 10:16 pm Mar 15, 1984 ****/ There is a dual port RAM from Synertek (1Kx8) that is being sampled right now. The part number is SY2130 and has an access time of 100 ns. the only conflict is when both ports try to access the same address. 48 pin with separate address and data lines, busy, and interrupt lines. mike ziuchkovski /* ---------- */ Do you mean that two different addresses can be accessed simulataneuosly? This is kind of unusual. Do you have any idea how is this done?