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From: sct@lanl-a.UUCP
Newsgroups: net.micro
Subject: Re: clocked FF from PAL16L8
Message-ID: <6307@lanl-a.UUCP>
Date: Mon, 30-Apr-84 16:19:14 EDT
Article-I.D.: lanl-a.6307
Posted: Mon Apr 30 16:19:14 1984
Date-Received: Tue, 1-May-84 19:06:32 EDT
References: <4577@amd70.UUCP>
Organization: Los Alamos National Laboratory
Lines: 8


  Did you implement a gate level design of a D flip flop?
  Also, is there a lot of interest out there in digital design
in general and programmable logic arrrays in particular?
  Has anyone had problems with PALASM?  We have!  I have yet to see
test vectors loaded into a programmer and actually work.
  What is the opinion of other designers on some of the ECADD systems
currently being produced for the IBM-PC.  We've been evaluating P-CAD
from a company in California and it looks promising.