Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!akgua!sdcsvax!sdcrdcf!hplabs!sri-unix!MKB@CMU-CS-C.ARPA From: MKB@CMU-CS-C.ARPA Newsgroups: net.micro Subject: Synertek SY2130 Message-ID: <179@sri-arpa.UUCP> Date: Thu, 26-Apr-84 08:36:00 EDT Article-I.D.: sri-arpa.179 Posted: Thu Apr 26 08:36:00 1984 Date-Received: Fri, 11-May-84 08:27:00 EDT Lines: 21 From: Mike Blackwell >From the Synertek SY2130 data sheet: The SY2130 and SY2131 feature two seperate I/O ports that allow independent access for read and write to any location in the memory. The only situation where contention can occur is when both ports are active and both addresses match. Two modes of operation are provided for this situation. In one mode, contention is ignored and both operations are allowed to proceed. In the other mode, on-chip control logic arbitrates delaying one port until the other port's operation is complete. A ~BUSY flag is sent ot the side whose operation is delayed. ~BUSY is driven out at speeds that allow the port's processor to preserve its address and data. An interrupt function (~INT) is also provided to allow communication between systems. This function acts like a writable flag. When the flag's location is written from one side, the other side's ~INT pin goes LOW until the flag location is read by that side. Both the ~BUSY and ~INT pins are open drain outputs to allow OR-tied operation. [Goes on to describe power-down mode, and differences between 2130 and 2131]