Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 5/3/83; site utecfa.UUCP Path: utzoo!utcsrgv!utai!uthub!utecfa!jayar From: jayar@utecfa.UUCP (Jonathan Rose SF2202 5036) Newsgroups: ut.general Subject: Seminar On Optimization of Domino CMOS Logic & Standard Cells Message-ID: <147@utecfa.UUCP> Date: Tue, 15-May-84 16:16:27 EDT Article-I.D.: utecfa.147 Posted: Tue May 15 16:16:27 1984 Date-Received: Tue, 15-May-84 19:03:33 EDT Organization: Engineering, University of Toronto Lines: 28 Cider Seminar Series Part CXXXIX Optimization of Domino CMOS Logic and Its Ap- plications To Standard Cells By Jakkie Pretorius Room GB 244 Time: 12:05 Date: Thursday May 17, 1984 Abstract (This is a preview of a paper to be presented at CICC Rochester next week) CMOS technology has emerged as the most suitable approach for the generation of standard cells in integrated circuit design. While dynamic logic is generally not con- sidered suitable for cell based design, Domino cmos appears to be viable because it is fully buffered and compatible with static CMOS. An analytic model used for optimizing Domino cells will be presented. A cell based serial/parallel multiplier is used to illus- trate the concept of a mixed Domino and static cell design approach.