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From: ken@turtlevax.UUCP (Ken Turkowski)
Newsgroups: net.micro.68k,net.arch,net.lang
Subject: Re: Inconsistent bit addressing in the 68020: big- AND little-endian
Message-ID: <493@turtlevax.UUCP>
Date: Tue, 28-Aug-84 13:34:33 EDT
Article-I.D.: turtleva.493
Posted: Tue Aug 28 13:34:33 1984
Date-Received: Thu, 30-Aug-84 10:22:19 EDT
References: <491@turtlevax.UUCP> <444@loral.UUCP>
Organization: CADLINC, Palo Alto, CA
Lines: 35

=== REFERENCED ARTICLE ===================================
	From: ian@loral.UUCP (Ian Kaplan)
	Subject: Re: Inconsistent bit addressing in the 68020: big- AND little-endian

	In Ken Turkowski's article on the big and little endian
	addressing used on the 68020 he commented that Motorola's
	approach "proved" that a machine with consistant bit addressing
	(e.g., all little or big endian) was impossible.  I assume that
	he was joking.  If not perhaps a follow up article could be
	submitted clairifing this.  It is becoming widely recognized
	that consistant (or orthogonal) instruction sets are a
	desirable architectural feature.  (The NS32016 instruction set
	is one example of an orthogonal instruction set.)  If
	consistant instruction sets are desirable, then it seems
	obvious that consistant bit addressing is also desirable.
=== ARTICLE REFERENCED by ian@loral.UUCP =================
	From: ken@turtlevax.UUCP (Ken Turkowski)
	Subject: Inconsistent bit addressing in the 68020: big- AND little-endian

	...
	This proves that it is impossible to make a consistent
	big-endian machine!  :-)
=================================================================

Note the toungue-in-cheek symbol, ian.  Obviously it is possible to
make a consistent big- or little-endian machine.  In fact, if you
eliminate the old bit set/clear/test instructions, it becomes a
consistent big-endian machine (See sun!gnu John Gilmore's article
1638@sun.uucp).  You just have to get used to the convention that bit 0
is the most significant bit.

-- 
Ken Turkowski @ CADLINC, Palo Alto, CA
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