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Path: utzoo!watmath!watcgl!dmmartindale
From: dmmartindale@watcgl.UUCP (Dave Martindale)
Newsgroups: net.micro.68k,net.arch
Subject: Re: Inconsistent bit addressing in the 68020: big- AND little-endian
Message-ID: <3049@watcgl.UUCP>
Date: Sat, 1-Sep-84 14:34:46 EDT
Article-I.D.: watcgl.3049
Posted: Sat Sep  1 14:34:46 1984
Date-Received: Mon, 3-Sep-84 07:37:12 EDT
References: loral.444 <491@turtlevax.UUCP> <1185@rti-sel.UUCP>, <1136@hcrvax.UUCP>
Organization: U of Waterloo, Ontario
Lines: 13

As someone else pointed out, the VAX floating point format is big-endian,
but that it makes some sense.  Look at it this way:  The bits adjacent
to the decimal point in an integer are at the addressed [byte] location,
and higher-order bits in the word/longword/quadword are at successively
higher addresses.  The bits adjacent to the decimal point in all floating
point formats (plus the exponent, of course) are also at the addressed
[word] location, with lower-order bits at higher memory addresses.
Thus you can use the "feature" of passing the address of a double where
the address of its float portion is needed without having to add an offset.

The bit field instructions are entirely little-endian, contrary to someone
else's comment.  Bit fields cross byte, word, and longword boundaries in
a consistent manner - the higher-order bits are always at the higher address.