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From: jdb@mordor.UUCP (John Bruner)
Newsgroups: net.micro.68k,net.arch
Subject: Re: Inconsistent bit addressing in the 68020 -> VAX floating point
Message-ID: <5728@mordor.UUCP>
Date: Tue, 4-Sep-84 11:23:48 EDT
Article-I.D.: mordor.5728
Posted: Tue Sep  4 11:23:48 1984
Date-Received: Thu, 13-Sep-84 06:28:17 EDT
References: loral.444 <491@turtlevax.UUCP> <1185@rti-sel.UUCP>, <1136@hcrvax.UUCP> <3049@watcgl.UUCP>
Organization: S-1 Project, LLNL
Lines: 10

The weird byte ordering for VAX floating point is due to compatibility
with the floating-point format on the PDP-11.  The little-endian order
for bytes within a 16-bit word and big-endian order of 16-bit words
is also visible on the PDP-11 in its representation of 32-bit long
integers (both by the floating-point processor and the EIS multiply
and divide instructions).
-- 
  John Bruner (S-1 Project, Lawrence Livermore National Laboratory)
  MILNET: jdb@mordor.ARPA [jdb@s1-c]	(415) 422-0758
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