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From: dmmartindale@watcgl.UUCP (Dave Martindale)
Newsgroups: net.micro.68k,net.arch
Subject: Re: Nothing New Here / Re: VAX Floating Point
Message-ID: <3104@watcgl.UUCP>
Date: Wed, 12-Sep-84 10:34:10 EDT
Article-I.D.: watcgl.3104
Posted: Wed Sep 12 10:34:10 1984
Date-Received: Thu, 13-Sep-84 05:28:56 EDT
References: <1191@rti-sel.UUCP>, <4190@fortune.UUCP>, <420@watdcsu.UUCP>
Organization: U of Waterloo, Ontario
Lines: 23

The VAX (whose F and D floating formats were copied from the PDP-11) has
quite reasonable floating point - normalization is binary and the leading
'1' bit is not stored, so it gets several bits more precision than the
IBM three-sickly.  And it takes some care to round properly.
It has a relatively small exponent range, fixed in the G and H floating
point types introduced a few years ago.  I believe that it was proposed
as one of the competing standards for the IEEE 754 floating-point standard.

If you want to see a really interesting floating-point format, read up
on what was eventually adopted for the IEEE 754 standard.  It starts
out similar to VAX floating point in representation, but adds
gradual underflow of numbers too small to normalize, and representations
for infinity and NaN (Not a Number - basically an undefined result).
There is an extended-precision format defined for partial results
in internal registers.  Rounding can be done to the nearest integer,
towards 0 (truncate), or towards plus or minus infinity.  All the
special cases of doing arithmetic on operands of zero, infinity,
and NaN are specified, as are the actions if a result overflows or
underflows or an operation is invalid.  Lots of neat stuff.

It is nice to see someone make a hardware design more complex in order
to make the software simpler and more straightforward (and more likely
to be correct).