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From: bcase@uiucdcs.UUCP
Newsgroups: net.arch
Subject: Re: To Flag Or Not To Flag...
Message-ID: <27800031@uiucdcs.UUCP>
Date: Mon, 5-Nov-84 19:42:00 EST
Article-I.D.: uiucdcs.27800031
Posted: Mon Nov  5 19:42:00 1984
Date-Received: Wed, 7-Nov-84 06:35:46 EST
References: <353@mako.UUCP>
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Nf-ID: #R:mako:-35300:uiucdcs:27800031:000:1515
Nf-From: uiucdcs!bcase    Nov  5 18:42:00 1984

[]

Re:  condition code setting and whether to set all the time or only
     when explicitly asked for (i.e. TST in PDP-11s).

There is a paper, whose author I cannot presently recall, entitled
(hmm, I guess I cannot even recall that precisely) "The PDP-11, an
examply of how NOT to do condition codes."  In this paper, the author
shows that about 90% of the time, the effort spent by the hardware
to set condition codes is wasted.  Most of the time that a program
wants to use the condition codes for conditional branching, the program
uses an explicit TST instruction anyway!  There is a related discussion
taken up in "Hardware/Softare tradeoffs for performance" by Hennessey
et. al. (am not even sure of that title) where the authors take the
stand that condition codes are, in general, a bad idea.  I just happen
to agree, except that they can be convenient quite often.  In a machine
that I have built (a RISC-like machine), there is one condition code bit
which is explicitly set to reflect a selected condition and can then
either be implicitly named by a conditional branch ("branch condition
code bit true", "branch condition code bit false") or gated onto one
of the ALU source busses so that the condition can be directly converted
to data.  This, I think, efficiently satisfies most needs since a program
can be interested in at most one *condition* (as opposed to condition
code bits such as negative, overflow, zero, ...) (a *condition* is a
combination of condition code bits) at a time.

    bcase