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Path: utzoo!linus!decvax!decwrl!flairvax!kissell
From: kissell@flairvax.UUCP (Kevin Kissell)
Newsgroups: net.arch
Subject: Re: 68020 Performance Revisited after re
Message-ID: <811@flairvax.UUCP>
Date: Mon, 5-Nov-84 18:42:15 EST
Article-I.D.: flairvax.811
Posted: Mon Nov  5 18:42:15 1984
Date-Received: Thu, 8-Nov-84 02:48:18 EST
References: <4021@decwrl.UUCP>, <27800026@uiucdcs.UUCP>
Organization: Fairchild AI Lab, Palo Alto, CA
Lines: 12

>						And the software time
> spent invalidating the cache it absolutely of no conern here:  one
> cycle (instruction?).  Even a more expensive cache built out of TI's
> 2150 tag buffer chips would still only require one cycle to invalidate
> (assuming, as has been stated, that the cache keys on virtual addresses).

The price paid for purging a virtual-address cache when the virtual map
changes is not so much in the overhead of the act of purging itself, but 
in the loss of those cache lines that otherwise would have remained valid 
and thus been available for use when the pre-purge context was restored.
This can be significant in systems with large caches and frequent context
switches.