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From: info-vlsi@ucbvax.ARPA
Newsgroups: fa.info-vlsi
Subject: VLSI Design Tools Release
Message-ID: <3498@ucbvax.ARPA>
Date: Tue, 27-Nov-84 13:06:27 EST
Article-I.D.: ucbvax.3498
Posted: Tue Nov 27 13:06:27 1984
Date-Received: Wed, 28-Nov-84 04:26:26 EST
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Organization: University of California at Berkeley
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From: Tony.Marriott@uw-vlsi.ARPA


			CMOS TOOLSET AVAILABLE

                           (RELEASE 2.1)


The University of Washington / Northwest VLSI Consortium has assembled and
integrated a number of VLSI tools from educational and industrial sources.
A second release of these tools (compatible with Berkeley UNIX 4.2) is now 
available and is free of charge to universities and government contractors. 
Fully supported are:  buried contact nMOS processes, the MOSIS 3 micron bulk
CMOS process, and a 5 micron isoplanar CMOS process.

Included in this package are:


	The March 1983 VLSI Tools from UC Berkeley, including Caesar,
	Lyra, Crystal, Mextra, Tpack, Spice2g6, and our enhancements
	to these tools.

	A pascal-based procedural layout system (Plap) with placement
	and interconnect capability for cells created with a graphical
	editor.

	Artwork display programs driving printers, penplotters and crt
	displays.

	A netlist generator and timing simulator (derived from MIT's
	Net/Presim/Rnl) including extensive tutorials.

	Pads, padframes, and PLA generators in all technologies.

	Characterized layouts for a set of standard cells in bulk and
	isoplanar CMOS.


All inquiries should be addressed to:


			Vicky Palm
			UW/NW VLSI Consortium
			Department of Computer Science, FR-35
			University of Washington
			Seattle, Washington 98195

	Telephone:	(206) 545-3796
	Electronic Mail: palm@washington



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