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From: kiessig@idi.UUCP (Rick Kiessig)
Newsgroups: net.arch
Subject: Re: RISC processors
Message-ID: <267@idi.UUCP>
Date: Wed, 14-Nov-84 00:33:34 EST
Article-I.D.: idi.267
Posted: Wed Nov 14 00:33:34 1984
Date-Received: Thu, 15-Nov-84 02:19:11 EST
References: <641@watdcsu.UUCP>
Organization: Intelligent Decisions, Inc., Saratoga, CA
Lines: 12

RISC machines may not be as good as they look at first
glance.  The Berkeley implementations, in particular, gain
nearly all of their performance by using register windows.
The simplicity of the instruction set may in fact slow these
chips down, although it certainly makes them easier to
implement.

-- 
Rick Kiessig
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