Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!mcnc!decvax!genrad!mit-eddie!godot!ima!inmet!stern From: stern@inmet.UUCP Newsgroups: net.arch Subject: RISC vs VAX Message-ID: <1815@inmet.UUCP> Date: Sat, 17-Nov-84 01:44:15 EST Article-I.D.: inmet.1815 Posted: Sat Nov 17 01:44:15 1984 Date-Received: Mon, 19-Nov-84 02:46:17 EST Lines: 37 Nf-ID: #N:inmet:2500011:000:2273 Nf-From: inmet!stern Nov 15 10:14:00 1984 In response to "Is is possible to build a RISC in the same class as a VAX?" I'd have to say the answer is yes and no. If you want to talk about integer computations, procedure entry/exit, and data movement, by all means yes. In theory, it would be possible to design and implement a RISC with a performance in the same class as a VAX -- meaning only that the RISC could shuffle data, access memory with a *few* addressing modes (direct and register indirect are probably the easiest) and zip through some integer computation code faster than a VAX 780. RISC architecture is not suited for floating point operations, or matrix multiplications, since the arithmetic steps produce a very tight bottleneck. In my somewhat young opinion, a RISC is ideal for LISP hacking -- most of what you are doing is searching, matching, and chasing pointers. In this application, a RISC beats a VAX hands-down. The answer to the original question is also "no," due to the problem of i/o on a RISC. Attaching an ACIA (or similar character-oriented i/o device) to the RISC could be a big difficulty -- the cycle times of the two devices are different by one or two orders of magnitude. You can either halt the RISC while doing character i/o (boo hiss) or use the RISC as an attached processor: plug it into a spare UNIBUS slot and let a VAX share its memory. The i/o problem is then solved: whatever OS you have running on the VAX does the i/o, and the RISC does the nasty computation. Perhaps a better question would be "Do you want to run a RISC with the power of a VAX stand-alone?" I think it might be better to plug eight or sixteen RISC boards into a VAX, rehack UNIX to download microcode for appropriate tasks, and thereby save VAX cycles for cycle-hungry tasks. Example: Write a search routine to get downloaded onto a RISC. Put the relevant data in the common VAX/RISC memory and let the RISC rip. Mr. VAX goes and deals with somebody else's process, and the search job finishes *faster* than if the VAX had done it. This isn't just a marvel of parallel processing -- the RISC really would complete the task faster than a VAX could. They just can perform *every* task faster than a VAX. Hal Stern Intermetrics, Inc {ihnp4, harpo, esquire, ima}!inmet!stern