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From: srm@nsc.UUCP (Richard Mateosian)
Newsgroups: net.arch
Subject: Re: cache designs
Message-ID: <1888@nsc.UUCP>
Date: Fri, 23-Nov-84 13:34:34 EST
Article-I.D.: nsc.1888
Posted: Fri Nov 23 13:34:34 1984
Date-Received: Sat, 24-Nov-84 02:55:10 EST
References: <2571@dartvax.UUCP> <823@flairvax.UUCP>
Organization: National Semiconductor, Sunnyvale
Lines: 8

> Well, the 68020 has cache-control instructions of a sort -  you can freeze 
> the on-chip cache.

There is no way that a user-mode program can use that feature, even through
a system call.
-- 
Richard Mateosian
{amd,decwrl,fortune,hplabs,ihnp4}!nsc!srm    nsc!srm@decwrl.ARPA