Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site uw-beaver Path: utzoo!watmath!clyde!cbosgd!ulysses!mhuxr!mhuxb!mhuxn!mhuxm!mhuxj!houxm!vax135!cornell!uw-beaver!info-mac From: info-mac@uw-beaver Newsgroups: fa.info-mac Subject: Re: 512k upgrade Message-ID: <758@uw-beaver> Date: Tue, 5-Feb-85 05:20:21 EST Article-I.D.: uw-beave.758 Posted: Tue Feb 5 05:20:21 1985 Date-Received: Thu, 7-Feb-85 03:28:04 EST Sender: daemon@uw-beaver Organization: U of Washington Computer Science Lines: 16 From: nate@cadmus (Nate Goldschag) Eric- It is real hard for me to put the file on the net for various reasons. I sent a floppy with both files to Rich Cower so perhaps he can put them on the net. 150 ns memory chips refer to the access time from the RAS signal on the chip - the time after RAS when read data is available. So naturally 150ns chips are faster than 200ns chips and therefore certainly OK for an upgrade. Cycle time is something else. A 150ns chip can access in 150ns but there will be a time when RAS must precharge of perhaps 90 or 100 ns. So the fastest you can cycle a 150ns chip is about 240ns. Don't confuse that 4 Mhz cycle rate with the 8 Mhz 68000. The 68000 with no wait states takes 4 clock cycles to do a memory access so an 8 Mhz part has 500 ns to cycle - plenty of time.