Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 5/3/83 based; site houxl.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!ihnp4!houxm!houxl!ksg From: ksg@houxl.UUCP (K.GRANT) Newsgroups: net.arch Subject: Computer Architecture Simulator Message-ID: <604@houxl.UUCP> Date: Mon, 28-Jan-85 23:50:05 EST Article-I.D.: houxl.604 Posted: Mon Jan 28 23:50:05 1985 Date-Received: Wed, 30-Jan-85 05:25:50 EST Distribution: net.ai Organization: AT&T Bell Labs, Holmdel NJ Lines: 19 Does anyone out there know about the existence of or current work on a general purpose computer architecture simulator? Basically, I want to be able to simulate various existing computer architectures from 8 bit to 64 bit cpus, using my own "instructions" . I am looking for a simulator that will allow me to change such parameters as: word size, byte ordering, instruction format, addressing modes and also the usage of pipelines and caches. I would like to use this simulator as a training aid for a future course on computer architecture. If you have information, I can be reached at 201-981-2429, or by mail at: ...!ihnp4!pyuxvv!nich Brian