Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site harvard.ARPA Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!godot!harvard!breuel From: breuel@harvard.ARPA (Thomas M. Breuel) Newsgroups: net.micro.68k Subject: Re: Why no INC or DEC Message-ID: <310@harvard.ARPA> Date: Mon, 21-Jan-85 06:55:01 EST Article-I.D.: harvard.310 Posted: Mon Jan 21 06:55:01 1985 Date-Received: Wed, 23-Jan-85 05:48:51 EST Distribution: net Organization: Harvard University Lines: 16 > wince when I see "ADDQ #1,D0", even if it does have a Q in it. I claim > this is a natural tendency, since this kind of thing really is inefficient > on other CPU's. I advise making an INC and DEC macro if you also have this > tendency. "ADDQ" makes sense on a 68000, since you have to increment not only by 1 (for pointers to bytes), but also by 2 and 4 (for pointers to words and longwords respectively). "INC" and "DEC" are anachronisms from processors like the Z80. I would actually recommend you to leave out the "Q" in the instruction. MOTOROLA assemblers and compatibles automatically use the shortest instruction possible, and assembly language listings look a lot nicer if they are not cluttered with instruction modifiers. Thomas.