Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site watcgl.UUCP Path: utzoo!watmath!watcgl!jchapman From: jchapman@watcgl.UUCP (john chapman) Newsgroups: net.micro.68k Subject: Re: seeking advice on dynamic memory controller Message-ID: <1476@watcgl.UUCP> Date: Sat, 16-Mar-85 13:07:23 EST Article-I.D.: watcgl.1476 Posted: Sat Mar 16 13:07:23 1985 Date-Received: Sun, 17-Mar-85 01:12:59 EST References: <421@umd5.UUCP> Distribution: na Organization: U of Waterloo, Ontario Lines: 26 > Hello! I've got a little project going on at home with a Motorola > 68000 Educational Computer Board. This is a single board 68K with > 32K bytes of 4116 type memories, organized as 16K x 16bits. The 68K > is running at 4MHz. > > I find that I need more than 32K of memory, and have been considering > adding 128K (16 4164 devices). I can't replace the existing 32K of > memory since it runs from 0x0000 to 0x7FFF, and there is a ROM monitor > addressed starting at 0x8000. It doesn't seem practical to use the > existing dynamic RAM refresh logic and address multiplexors. I was > considering a design using the Intel 8203 dynamic RAM controller. Is > this a good idea? Are there any alternatives that I should look into? > -- > -- > Louis A. Mamakos WA3YMH University of Maryland, Computer Science Center The 8203 is very easy to design with and does just about everything you would want; it is, however, slow - a board designed with 150ns drams will probably end up with a board access time of around 450ns. This may not be a problem in your case. I think the 8203 is a little bit easier to work with (takes care of more details) than other easily available chips I have seen. TI apparently has a similar chip but I don't know anything about it (if someone would post or mail me details on it I would be interested: thanks). John