Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site watcgl.UUCP Path: utzoo!watmath!watcgl!jchapman From: jchapman@watcgl.UUCP (john chapman) Newsgroups: net.micro.cpm Subject: Re: Dynamic Memory Message-ID: <1452@watcgl.UUCP> Date: Tue, 12-Mar-85 10:26:29 EST Article-I.D.: watcgl.1452 Posted: Tue Mar 12 10:26:29 1985 Date-Received: Wed, 13-Mar-85 00:08:12 EST References: <8809@brl-tgr.ARPA> <523@intelca.UUCP> <809@ucbtopaz.CC.Berkeley.ARPA> Organization: U of Waterloo, Ontario Lines: 96 > > The lesson to be learned is that if you have a disk controller that > > does DMA don't buy dynamic memory. > > Please don't tell my Intersystems Box! I'd hate for the DMA to quit working > after 5 years [4 MHz z80, no wait states]. > > 3.2 ms to transfer just two 1k sectors; the refresh period of the rams is 2ms, so unless your disk controller is willing to allow the memory to have wait states (which it may very well do - however it is *not* to be taken for granted) or the memory can sneak refresh cycles in while the interface isn't looking (some try to sync up with bus activity and do their refresh cycles after a memory access, which because of the speed of an st506, would work in this case) then your system will not work. Another example : because of the way static rams are set up you can leave the chips enabled all the time and feed in the address bus continually to the chips; when the control circuitry on the board decides the board is actually being addressed for a memory cycle it can gate the data lines to/from the chips and set the read/write enable appropriately. Beacuse of the timing of most of the micros there is a significant delay between the address appearing on the bus and the control/status information describing the cycle appearing on the bus - using the above technique (which is implemented on a board I own) can decrease board access time by significant amounts (50-100 ns). The way that addresses are gated into drams (and cycles initiated) precludes doing this. and on and on and on and on....... Opinion: do not buy a dram board unless you know (or someone you trust tells you) that it will work in the configuration in which you plan to use it; if you buy it be prepared to have to throw it out if you ever want to change any part of your system that does dma (including/especially the cpu). Opinion: if you buy everything from the same manufacturer it will probably all work but eventually you will have the same problem as above (unless the same manufacturer also makes the new board as well). Opinion: I think that one of the big reasons for the decline of S100 popularity is dynamic memory - for what it costs to buy one 64k static board for an s100 you can get 256k dynamic boards (that work) for pc clones; I mean geez, for the price of one Compupro 256k static board you can get a complete sanyo mbc, with disk drive, monitor, software, and 256k. I think this is a crying shame - s100 systems are flexible and do not commit you to a single manufacturer, the bus interface is actually very simple and the entire s100 concept encourages proliferation of ideas, products and concepts. Micros today seem to be heading towards a very mainframe mentality - medicority dominates. Opinion: There is no reason why a good s100 dynamic board could not be made for <500 with 1mbyte of no wait state (and refesh states <5% of the time) memory, given the LSI dram controllers available and the current price of 256k chips. Just keep to the standard. and on and on and on ...... Sorry to be so lengthy, John Chapman ...!watmath!watcgl!jchapman