Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.2 9/5/84; site terak.UUCP
Path: utzoo!linus!philabs!cmcl2!seismo!hao!noao!terak!doug
From: doug@terak.UUCP (Doug Pardee)
Newsgroups: net.micro,net.micro.68k,net.micro.16k
Subject: Re: Floating Point Comparisons
Message-ID: <484@terak.UUCP>
Date: Fri, 5-Apr-85 12:44:45 EST
Article-I.D.: terak.484
Posted: Fri Apr  5 12:44:45 1985
Date-Received: Mon, 8-Apr-85 00:24:24 EST
References: <133@cfa.UUCP> <6370@boring.UUCP>
Organization: Terak Corporation, Scottsdale, AZ, USA
Lines: 16
Xref: linus net.micro:8612 net.micro.68k:642 net.micro.16k:284

> >     Microprocessor           FADD  FSUB  FMUL  FDIV  DADD  DSUB  DMUL  DDIV
> >NS32016/NS32081 10 MHZ        7.40  7.40  4.80  8.90  7.40  7.40  6.20 11.90
> >NS32016/NS32081 8 MHZ         9.25  9.25  6.00 11.13  9.25  9.25  7.75 14.86
>
> Is this true? It *does* sound funny to me that additions and
> subtractions take longer than multiplies....

I don't know about the 32081 specifically, but the usual reason for this
kind of behavior is that before a floating point addition or subtraction
can be performed, the operand with the lesser exponent must be
"de-normalized" to have the same exponent as the other operand.  Since
the '081 operates on 53-bit fractions, this might take up to 53 shift
operations, at one bit per clock cycle.  Let's see, 53 * 100 ns = 5.3
microseconds just for pre-normalization.
-- 
Doug Pardee -- Terak Corp. -- !{hao,ihnp4,decvax}!noao!terak!doug