Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site leadsv.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!mcnc!philabs!prls!amdimage!amdcad!cae780!leadsv!pape From: pape@leadsv.UUCP (Robin Pape) Newsgroups: net.micro Subject: Re: alternative to current circuit board technology Message-ID: <414@leadsv.UUCP> Date: Thu, 18-Apr-85 17:00:32 EST Article-I.D.: leadsv.414 Posted: Thu Apr 18 17:00:32 1985 Date-Received: Mon, 22-Apr-85 02:11:22 EST References: <9869@brl-tgr.ARPA> <1399@amdahl.UUCP> Organization: LMSC-LEADS, Sunnyvale, Ca. Lines: 31 > > [ from the Austin American Statesman, April 9, 1985 ] > > > > CIRCUIT BOARD UPDATE SHOWN > > > > MOSAIC SYSTEMS Inc, said Monday it has developed a small alternative to the > > conventional circuit board on which computer chips are mounted. Mosaic's > > process uses microscopic current conductors deposited on a wafer rather than > > using wires to link chips together. > > [ does anyone know what is being described here? Certainly, linking chips > > together using wires doesn't sound like current methods. ---Werner ] > > ------- > > I vaguely remember a newspaper account of this where the channels consist > of amorphous silicon (the Ovshinsky technology) which are made conducting > or not by an applied voltage. Chips are glued on top of the wafer - sort > of surface mount - and the wafer serves as the circuit board. It is alleged > to be a neat way of fabricating very small "boards". The conduction of > the channels can be changed for EC's. > Back in 1968-69 timeframe we "surface mounter" a bunch of MOS memory chips onto a 2" silicon wafer using "solder bump" technique. The interconnection was by standard metalization layers. This was at Philco-Ford Micro E division in Santa Clara. We did this primarily because ceramic substrates processes were not available in-house but we were up to our ears in reclaimable wafers. Worked OK - but it was not commercialized. Figured it would come around again in due time! (-: ROBIN :-)