Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.3 alpha 4/15/85; site seismo.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!gatech!seismo!mo From: mo@seismo.UUCP (Mike O'Dell) Newsgroups: net.micro Subject: 386 Message-ID: <2140@seismo.UUCP> Date: Tue, 30-Apr-85 07:44:56 EDT Article-I.D.: seismo.2140 Posted: Tue Apr 30 07:44:56 1985 Date-Received: Wed, 1-May-85 04:43:42 EDT Organization: Center for Seismic Studies, Arlington, VA Lines: 22 Some 386 design folks at Intel took great exception to my note indicting the 8[012]86 design which also mentioned the 386 while pointing out it IS different in important ways. It seems they are a might sensitive about the criticizisms. It seems the 386 is a muliple-personality case - code segments are marked with the kind of instructions they contain and things shift gears as you JSR around, so to speak. The real point is that the 386 in its maximal persona is still a segmented machine, but with 48-bit addresses. The segment number is still 16-bits, but the offset grows 16 more. So, it is possible to run it as a flat-address-space 32-bit machine by using fixed segments, or, if you want to deal with 48-bit pointers and 32-bit integers, a 256 giga-byte segmented machine. Holy Multics, Batman! On the 286, segments aren't paged, but must be wholy in memory - but they can be demand-faulted in. I assume the 386 pages under those gigantic segments. So, judging from the information I have seen in the promotional literature and road-show on the 386, it seems they have designed a real cpu, and not a useful but limited data pump, like its bretheren. Maybe they can catch Motorola. -Mike O'Dell