Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83; site abnji.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!mhuxt!mhuxv!abnji!jeff From: jeff@abnji.UUCP (jeff) Newsgroups: net.micro,net.arch Subject: what really happens during a bus acknowledge? Message-ID: <650@abnji.UUCP> Date: Mon, 20-May-85 14:02:07 EDT Article-I.D.: abnji.650 Posted: Mon May 20 14:02:07 1985 Date-Received: Tue, 21-May-85 06:54:51 EDT Lines: 24 Xref: watmath net.micro:10446 net.arch:1222 [interrupt request acknowledged!] An honest question: When a cpu (such as the 8086, 68k,etc) acknowledges a bus request, does it halt internal execution with the bus acknowledge, or after the bus acknowledge only when bus activity is needed (deferring prefetch if necessary)? example: The instruction queue/cache is full of register to register (or other internal) instructions when the bus request is acknowledged. Will it execute them while the bus is relinquished? Chips with on-chip cache can do a lot with no external bus action. Did anyone bother to make the control section sophisticated enough to handle this? It would be a real boon to multi-processor applications! I see that the reasoning to on-chip memory and peripherals is so the local and global busses can be relinquished and still have the CPU do some non-trivial work, as well as a speed advantage and less synchronization. Is anyone using this capability to its fullest? Jeff 'I really wanna know' Skot at foggy ATT IS Somerset, NJ {ihnp4 | mcnc | cbosgb} abnji ! jeff