Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site x.UUCP Path: utzoo!linus!philabs!cmcl2!seismo!harvard!talcott!panda!genrad!mit-eddie!cybvax0!frog!x!john From: john@x.UUCP (John Woods) Newsgroups: net.micro Subject: Re: 68851 MMU ????? Message-ID: <496@x.UUCP> Date: Fri, 10-May-85 10:45:33 EDT Article-I.D.: x.496 Posted: Fri May 10 10:45:33 1985 Date-Received: Sun, 12-May-85 11:16:20 EDT References: <259@petfe.UUCP> <1277@amdcad.UUCP> Distribution: net.micro.68k Organization: Charles River Data Systems, Framingham MA Lines: 28 > In article <259@petfe.UUCP>, randy@petfe.UUCP (Randy Banton) writes: > > Any comments about this statement in Electronic Design, May 5, 1985 > > on page 42 ? > > "Motorola Inc.'s chip set is not yet complete and rumors > > are that the company is having problems marrying its > > future MMU with the existing 68020 CPU." > Gee, maybe some day Motorola will catch up to Intel and integrate the > CPU and the MMU. > > expecting lots of flames on this one... Yup: Most manufacturers (with the exception of Intel) use the abbreviation MMU to mean Memory Management Unit. Intel's on-chip MMU is clearly a Memory Mismanagement Unit. The advantage of an off-chip MMU is that customers can design their own MMU, if they regard themselves as better at it (or understanding their needs better). However, there appears here a correlation between need to do so and inability to do so...... Why did computer design cease to advance with the PDP-11 :-)? -- John Woods, Charles River Data Systems, Framingham MA, (617) 626-1101 ...!decvax!frog!john, ...!mit-eddie!jfw, jfw%mit-ccc@MIT-XX.ARPA "MU" said the Sacred Chao...