Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83 (MC840302); site philmds.UUCP Path: utzoo!linus!philabs!cmcl2!seismo!mcvax!philmds!lucas From: lucas@philmds.UUCP (lucas) Newsgroups: net.micro.pc Subject: IBM AT bustiming. Message-ID: <205@philmds.UUCP> Date: Sat, 11-May-85 09:37:04 EDT Article-I.D.: philmds.205 Posted: Sat May 11 09:37:04 1985 Date-Received: Sun, 12-May-85 02:07:22 EDT Organization: Philips S&I MDS Eindhoven Lines: 17 IBM PC-AT I have a specific question about bus timing. I want to adapt a memory board which has in some cases a maximum read access time of 4 microseconds ( address decoded to data valid ). It seems to me that only access times of 2.5 microseconds may be used ( I/O CH RDY (I) ). Question: On what depends access time limitations? W. van Oudheusden 08-05-1985