Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!henry From: henry@utzoo.UUCP (Henry Spencer) Newsgroups: net.works Subject: Re: PDP-8 Story Message-ID: <5587@utzoo.UUCP> Date: Fri, 10-May-85 16:19:25 EDT Article-I.D.: utzoo.5587 Posted: Fri May 10 16:19:25 1985 Date-Received: Fri, 10-May-85 16:19:25 EDT References: <1864@topaz.UUCP>, <3500002@pbear.UUCP> Organization: U of Toronto Zoology Lines: 30 > What I would like to see is a proposal of a "next generation" PDP-8, > > Something with say: > > 16 bit memory > 65K fields > 256 fields (yields 24Mb memory) > each field broken to 256 256 word pages > direct addressing mode (so arryas and stuff don't have to be paged) > built in extended AU > other goodies. > > Oh Yeah, a stack would be quite useful. To a sloppy first approximation, if you squint a lot, the Intel 8086 meets these specs. Yuck. 16-bit address spaces are the pits, even if you have lots of them. > This type of architecture would encourage (NOT force) the programmer to > write localized code for his routines. Also language compilers would be > designed to take advantage of this concept. You mean "language compilers could be designed, at horrendous cost in pain and effort, to take advantage of this concept". Page boundaries and field boundaries are the two massive headaches in building a decent pdp8 compiler; I studied this for a while years ago. "There just ain't no graceful way." -- Henry Spencer @ U of Toronto Zoology {allegra,ihnp4,linus,decvax}!utzoo!henry