Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.3 alpha 4/15/85; site amdcad.UUCP Path: utzoo!utcs!lsuc!pesnta!amd!amdcad!phil From: phil@amdcad.UUCP (Phil Ngai) Newsgroups: net.micro Subject: Re: AT vs Z-100 - a myth Message-ID: <1477@amdcad.UUCP> Date: Fri, 31-May-85 20:46:09 EDT Article-I.D.: amdcad.1477 Posted: Fri May 31 20:46:09 1985 Date-Received: Sat, 1-Jun-85 05:31:02 EDT References: <1040024@acf4.UUCP> <1040026@acf4.UUCP> Reply-To: phil@amdcad.UUCP (Phil Ngai) Organization: AMD, Sunnyvale, California Lines: 47 In article <1040026@acf4.UUCP> tsc2597@acf4.UUCP (Sam Chin) writes: >Will someone from Intel get into this and clear this up. We are not >comparing uP from different companies. I'm not from Intel but have designed products with the Intel family and dynamic RAMs and feel qualified to point out that you can't just say "my system needs 1 wait state with 150 nS memories to run an 8086 at 8 MHz, therefore all 8 MHz 8086 systems must have 1 wait state if used with 150 nS memories". A good dynamic RAM design is hard. Many designers cop out and insert wait states to make their job easier. But that doesn't mean all systems yield the same performance with the same parts. My Honda Civic has 4 cylinders and burns gasoline, just like a Porsche 944, so it should be able to keep up, right? It is possible to run an 80186 at 8 MHz with no wait states and 150 nS memories with plenty of margin IF you know what you are doing. Or if you don't care about margin. This margin, by the way, is designed in by conscientous manufacturers to allow for variations in the devices they use and to allow operation over a range of temperatures. Some devices get slower when they get lot and some get slower when they get cold. A manufacturer wants his product to work in both environments. Flaky products are not appreciated by customers. The people who crank up the clock rate in their computers are reducing their margin. It's your choice, but don't think it's a conspiracy to sell deliberately degraded products. The 8086 is a little harder but not impossible. There are some memory controller devices offered which do require wait states. I would claim they have a lousy architecture. But some designers think they are convenient and so you will find them in some systems. By the way, I think references to "3 MHz" memory are pretty weird. You can say a memory has a 150 nS access time or a 500 nS cycle time but "3 MHz" is a very odd way to talk about a memory device. -- There's always tomorrow. Phil Ngai (408) 749-5720 UUCP: {ucbvax,decwrl,ihnp4,allegra}!amdcad!phil ARPA: amdcad!phil@decwrl.ARPA