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From: phil@amdcad.UUCP (Phil Ngai)
Newsgroups: net.micro
Subject: Re: AT vs Z-100 - a myth
Message-ID: <1478@amdcad.UUCP>
Date: Fri, 31-May-85 20:51:41 EDT
Article-I.D.: amdcad.1478
Posted: Fri May 31 20:51:41 1985
Date-Received: Sat, 1-Jun-85 05:31:22 EDT
References: <1040024@acf4.UUCP> <1040027@acf4.UUCP>
Reply-To: phil@amdcad.UUCP (Phil Ngai)
Organization: AMD, Sunnyvale, California
Lines: 18

In article <1040027@acf4.UUCP> tsc2597@acf4.UUCP (Sam Chin) writes:
>Now both Z-100 and AT use 150ns RAMS.  Why did the AT designers have to
>insert that 1 wait state?  The reason is that the 80286 was just too fast
>for those 150ns RAMS.  If the claim is that an 8088 running at 8 Mhz is
>faster than a 6 Mhz 80286 then it too must have that 1 wait state.  If it
>doesn't need 1 wait state, then it must obviously be slower than the 80286.

Sorry Sam, it isn't that simple. Using interleaved memory, you get 4 clock
cycles minus data strobe and data setup times to perform a memory cycle
on the 80286. Thus, an 8 MHz 80286 allows nearly 500 nS for a memory to
cycle. I think if the AT needs 1 wait state at 6 MHz to use 150 nS memories,
its designers must have been lazy (or lousy).
-- 
 There's always tomorrow.

 Phil Ngai (408) 749-5720
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