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Path: utzoo!utcs!mnetor!george
From: george@mnetor.UUCP (George Hart)
Newsgroups: net.micro.68k
Subject: Re: Re: More on PC relative destinations et. al. (L O N G)
Message-ID: <865@mnetor.UUCP>
Date: Fri, 24-May-85 10:08:45 EDT
Article-I.D.: mnetor.865
Posted: Fri May 24 10:08:45 1985
Date-Received: Fri, 24-May-85 11:18:40 EDT
References: <419@oakhill.UUCP> <143@drivax.UUCP>
Organization: Computer X (CANADA) Ltd., Toronto, Ontario, Canada
Lines: 33

In <143@drivax.UUCP>, Steve Williams writes...
> ...
> 2.	The principle use for this feature in our view of the world is to write
> 	position-independent code for shared runtime libraries.  (Makes it easy
> 	for the O/S to map the runtime into the user program if it can do so at
> 	any point in the user's logical address space).  You must have a 
> 	fixed address for the library jump table, of course.
> ...
> ...
> 
> 	-How about hardware context switching support?  But simple, please, no
> 	 call gates, interrupt tasks, or TSS's.  Just a memory area which 
> 	 contains the machine state and two instructions to load and store it.
> 
> 	-On chip memory-to-memory DMA.  We use message passing in some systems,
> 	 and this would make a tremendous difference.  Add a barrel shifter, 
> 	 and you could get real high-performance graphics (and GEM or the
> 	 Mac-style user interfaces).
> 

Good ideas...now add on chip floating point support and you would have
*some* chip!

Which brings me to another point: why hasn't float support become a standard
				  feature of today's chips?

-- 


Regards,

George Hart, Computer X Canada Ltd.
{cbosgd, decvax, harpo, ihnp4}!utcs!mnetor!george