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From: dave@soph.UUCP (Dave Brownell)
Newsgroups: net.micro.68k
Subject: Re: 68020 benchmarks?? (disbelieve Intel)
Message-ID: <157@soph.UUCP>
Date: Fri, 24-May-85 16:44:44 EDT
Article-I.D.: soph.157
Posted: Fri May 24 16:44:44 1985
Date-Received: Thu, 30-May-85 03:13:51 EDT
References: <155@soph.UUCP> <>
Reply-To: dave@soph.UUCP (Dave Brownell)
Organization: Enmasse Computer Corp., Acton, Mass.
Lines: 35


In article <> phil@amdcad.UUCP (Phil Ngai) writes:

> <enter sarcasm mode>
> Gosh, how could a 6 MHz 80286 do as good as a 12 MHz 68010?

    Ummm ... what are you talking about?  There is *no such part* as
    a 12 MHz 68010.  Let's not spread any misinformation here ...
    you are drawing some flakey conclusions from those numbers I put
    out.

> <exit sarcasm mode>

> The 80286 does *not* need faster memory devices than the 68000. What the
> 80286 does do is use the (same cost) memory devices more efficiently than
> the 68000. It's called pipelining and is a well known technique among
> computer professionals.

    Gee ... I must have hit a nerve somehow, to make a nettie resort
    to title-dropping.  Only, I thought "computer professional" was
    a term used only by "MIS Week".

Actually, the reason the 80286 chews up memory bandwidth is that it
uses a 250 ns. bus cycle (at 8 MHz) vs. a 400 ns. bus cycle for a 10 MHz
68010.  Since you don't have much time to decode the address, you either
use 120 ns. DRAM ($$$$) or add a wait state and slow it down to a 375 ns.
memory cycle.

Pipelining has nothing to do with it; though it *does* spend a lot of cycles
filling the pipeline, this has nothing to do with the memory speed needed.
-- 
	Dave Brownell
	EnMasse Computer Corporation
	enmasse!dave@Harvard.ARPA
	{genrad,harvard}!enmasse!dave