Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site LaBrea.ARPA Path: utzoo!watmath!clyde!burl!ulysses!allegra!bellcore!decvax!decwrl!Glacier!LaBrea!mann From: mann@LaBrea.ARPA Newsgroups: net.arch Subject: Re: I like segmented architectures Message-ID: <118@LaBrea.ARPA> Date: Sat, 8-Jun-85 13:26:59 EDT Article-I.D.: LaBrea.118 Posted: Sat Jun 8 13:26:59 1985 Date-Received: Tue, 11-Jun-85 02:51:21 EDT References: <276@spar.UUCP> <5653@utzoo.UUCP> <291@spar.UUCP> <1031@peora.UUCP> Organization: Stanford University Lines: 21 > > By the way, where are the 68XXX fans? Surely the Motorola chip isn't > > so bad that no one can find a defense for it. > > It's kind of hard to compare the 68000's MMU, which functions in a very > familiar, traditional way (the same way MMUs on many "mainframe" machines > work), with the very strange segmentation facilities of the 286. I felt J. Eric Roskos's message was a good comparison of 8086-style segmented architecture with more conventional linear address space models, and I'm essentially in agreement that linear address spaces are superior overall. But I'm curious as to what he's referring to when he talks about the 68000's MMU above. The 680X0 doesn't have an on-chip MMU -- which is in a sense one of its strengths, since the chips do support a large linear address space, and those who use them are free to build any style of outboard MMU for such an address space. Most have chosen to do fairly conventional paged MMUs (for instance, Sun). But there is no such MMU in the 68XXX family (yet). The 68451 is utterly ridiculous garbage (please look into how it works before flaming back at me). The more recent promised MMUs from Motorola and Signetics have not come out yet. --Tim