Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.3 alpha 4/15/85; site ucbvax.ARPA Path: utzoo!watmath!clyde!burl!ulysses!ucbvax!mwm From: mwm@ucbvax.ARPA (Mike (I'll be mellow when I'm dead) Meyer) Newsgroups: net.arch Subject: MMUs and OSs Message-ID: <7983@ucbvax.ARPA> Date: Sun, 9-Jun-85 21:44:35 EDT Article-I.D.: ucbvax.7983 Posted: Sun Jun 9 21:44:35 1985 Date-Received: Tue, 11-Jun-85 03:48:13 EDT References: <276@spar.UUCP> <5653@utzoo.UUCP> <291@spar.UUCP> <1031@peora.UUCP> <118@LaBrea.ARPA> Reply-To: mwm@ucbvax.UUCP (Mike (I'll be mellow when I'm dead) Meyer) Organization: Missionaria Phonibalonica Lines: 32 In article <118@LaBrea.ARPA> mann@LaBrea.ARPA writes: >The 68451 is utterly ridiculous garbage (please >look into how it works before flaming back at me). I've seen this kind of claim a lot recently, and would like someone to explain why the 68451 is "utterly ridiculous garbage" (one of the nicer things I've heard said about it). I do know how it works, and can see the problem with the 2 wait states and the (not enough) segment registers living on the chip. Ignore that. What I'm interested in is the basic design of the MM system. Is there something inherently broken about the double-mask technic the 68451 uses? It doesn't seem as if there is to me; other than that it won't work nicely with Unix (sensible of it). The chip would seem to have been made for use with a buddy system of memory allocation (which Mot. points out) in a non-paged environment. It can also simulate, without to much trouble, fixed-size pages for almost any power-of-two page size. If it had a second level underneath it to give paged segments, the MM architecture would seem to be a winner. So, could somebody let me know why the architecture the 68451 supports is so bad? Preferably someone who's tried to build an OS using the chip. Comparisons with both the 32XXX MMU (082?) and the Standford 68K MMU would probably help. Thanx,