Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: $Revision: 1.6.2.16 $; site ima.UUCP Path: utzoo!watmath!clyde!burl!ulysses!gamma!epsilon!zeta!sabre!bellcore!decvax!yale!ima!johnl From: johnl@ima.UUCP Newsgroups: net.arch Subject: Re: RISC/CISC - IBM mainframes Message-ID: <36900006@ima.UUCP> Date: Tue, 11-Jun-85 10:35:00 EDT Article-I.D.: ima.36900006 Posted: Tue Jun 11 10:35:00 1985 Date-Received: Fri, 14-Jun-85 00:00:00 EDT References: <1452@ecsvax.UUCP> Lines: 18 Nf-ID: #R:ecsvax:-145200:ima:36900006:000:888 Nf-From: ima!johnl Jun 11 10:35:00 1985 >/* Written 7:01 pm Jun 10, 1985 by hes@ecsvax in ima:net.arch */ >I have just heard a presentation by IBM on large systems directions. >It was predicted that an increasing amount of operating system >functions would be embodied in microcode. This seems to be the >opposite of RISC - with a vengance. Maybe not. By the time you've moved enough of your code into microcode, you can think of your computer as a RISC (the microengine) which occasionally runs a 370 emulation program for backward compatibilty. If IBM doesn't watch out, they're going to have such an investment in microcode that when they come out with a new model it'll be as important to have microinstruction set compatibility as 370 instruction set compatibility. Then we can expect them to microcode the microcode, leading to fascinating generations of nano-, pico-, femto-, and attocode. John Levine, ima!johnl