Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/5/84; site terak.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!ihnp4!houxm!vax135!cornell!uw-beaver!tektronix!hplabs!hao!noao!terak!doug From: doug@terak.UUCP (Doug Pardee) Newsgroups: net.arch Subject: Re: I like segmented architectures Message-ID: <603@terak.UUCP> Date: Tue, 11-Jun-85 11:22:51 EDT Article-I.D.: terak.603 Posted: Tue Jun 11 11:22:51 1985 Date-Received: Sun, 16-Jun-85 00:46:10 EDT References: <276@spar.UUCP> <5653@utzoo.UUCP> <206@ganehd.UUCP> Organization: Terak Corporation, Scottsdale, AZ, USA Lines: 33 > The iNTEL segments > are just big versions of the 4k addressing problem on the IBM mainframes > except on the IBM you can use 24bit pointers. Once again I must point out that the IBM 360/370/30xx architecture is *not* segmented. Addresses run linearly from 0 to 16M-1 for non-XA systems, 0 to 2G-1 for XA. What *was* botched was that there is no PC-relative addressing mode for branching. Since there is also no direct addressing mode available, this means that in order to branch, you first have to load a register with the address of the destination. Or, the more common approach, keep a register loaded with a procedure code address and then use the (register + offset) addressing mode. The offset is limited to 0-4095, giving rise to the erroneous claims that the IBM architecture has 4K segments. The "proper" way around this is to limit your routines to 4096 bytes in length, and when you call a subroutine you should load its address into a register to address it rather than using the (register + offset) mode. Then the subroutine can use that register to address all of its own procedure code using the (register + offset) addressing mode. The reason that this is important is that while the Intel architecture is a nuisance for large amounts of data but the procedure code is still quite manageable, the IBM is the other way around. Many IBM systems process unbelievable quantities of in-memory data (that's why they had to expand the addressing to allow each process to have more than 16 Mb of data). Arrays of 1 Gb in size are "no sweat" on an IBM XA machine. But addressing branch destinations requires planning. -- Doug Pardee -- Terak Corp. -- !{ihnp4,seismo,decvax}!noao!terak!doug ^^^^^--- soon to be CalComp