Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site utastro.UUCP Path: utzoo!watmath!clyde!burl!ulysses!gamma!epsilon!zeta!sabre!bellcore!decvax!linus!philabs!cmcl2!seismo!ut-sally!utastro!nather From: nather@utastro.UUCP (Ed Nather) Newsgroups: net.arch Subject: Re: RISC/CISC - IBM mainframes & ancient history Message-ID: <243@utastro.UUCP> Date: Sat, 15-Jun-85 16:22:30 EDT Article-I.D.: utastro.243 Posted: Sat Jun 15 16:22:30 1985 Date-Received: Tue, 18-Jun-85 05:35:17 EDT References: <1452@ecsvax.UUCP> <1062@peora.UUCP> Organization: U. Texas, Astronomy, Austin, TX Lines: 33 > A reasonable approach to producing CISC machines, then, would be to have the > compiler writers design the instruction set; and to have the instruction set > be changeable for different languages. The Packard-Bell PB-440 computer (what, never heard of it? well ...) was a Complex Instruction Set Computer with instructions realized in microcode stored in a writable control store. The instruction set was designed by the compiler writing team (all 3 of us) and had a different instruction set for different jobs (e.g. the Fortran compiler used a different instruction set from the instructions generated for run-time use). > This could be extended by having the > instruction set be further changeable by the individual user, We did an instruction set that emulated a popular IBM computer of that era, and was clocked to run faster than the original. > or automatically > by a program that analyzes instruction usage and moves frequently-used > instructions into microcode (vertical migration). Neat idea. We didn't think of that one. > (These are not new ideas, of course ... > -- > Full-Name: J. Eric Roskos The prototype PB-440 first ran in 1962. -- Ed Nather Astronony Dept, U of Texas @ Austin {allegra,ihnp4}!{noao,ut-sally}!utastro!nather nather%utastro.UTEXAS@ut-sally.ARPA