Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: $Revision: 1.6.2.16 $; site ima.UUCP
Path: utzoo!watmath!clyde!bonnie!akgua!whuxlm!harpo!decvax!yale!ima!johnl
From: johnl@ima.UUCP
Newsgroups: net.arch
Subject: Re: A feature, not a bug
Message-ID: <36900007@ima.UUCP>
Date: Fri, 21-Jun-85 18:54:00 EDT
Article-I.D.: ima.36900007
Posted: Fri Jun 21 18:54:00 1985
Date-Received: Mon, 24-Jun-85 03:50:53 EDT
References: <1680@amdcad.UUCP>
Lines: 17
Nf-ID: #R:amdcad:-168000:ima:36900007:000:830
Nf-From: ima!johnl    Jun 21 18:54:00 1985


>     If an instruction, other than a conditional transfer, reads
>     the PSW, the assembler m32as inserts a NOP before that
>     instruction.  This allows time for the PSW codes to settle
>     before the new instruction tries to access them.
> 
> Ahem.  Allows the codes to settle?  Don't they need to settle before
> the conditional transfer can reliably take place?

Sounds pretty smart to me.  Why waste chip real estate with locking circuits 
that'll be used .0001% of the time?  I expect that the WE 32100 chip 
special-cases the interlocking between branches and the tests they depend 
on.  For that matter, the 360/91 did that 15 years ago.  Speeds up the sorts 
of things that programs do all of the time, while only slightly complicating 
obscure stuff.  It really is a feature, not a bug.  

John Levine, ima!johnl