Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site peora.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!mhuxt!houxm!vax135!petsd!peora!jer From: jer@peora.UUCP (J. Eric Roskos) Newsgroups: net.arch,net.micro,net.micro.pc,net.micro.68k Subject: Re: Re: Re: Re: Need 286 "C" benchmark Message-ID: <1005@peora.UUCP> Date: Mon, 3-Jun-85 09:29:39 EDT Article-I.D.: peora.1005 Posted: Mon Jun 3 09:29:39 1985 Date-Received: Wed, 5-Jun-85 14:15:10 EDT References: <426@oakhill.UUCP> <8745@microsoft.UUCP> Organization: Perkin-Elmer SDC, Orlando, Fl. Lines: 41 Xref: watmath net.arch:1299 net.micro:10642 net.micro.pc:4119 net.micro.68k:853 [The referenced article discusses the advantages of having memory management on-chip on the 286 and 386, and emphasizes the alleged better speed of the 286 over the 68000 machines.] Why is so much time spent in these discussions talking about vague matters of opinion, and so little on WHY the problems exist? A major problem with the 286 (and I guess the 386 too, though I haven't seen it yet, only the fragmentary descriptions in this newsgroup) is in the number of bits available in the instructions themselves for addressing data. This is the primary addressing problem. The 8086 family has a maximum of 16 bits of address for most instructions. Even with the segmentation registers and memory management of the 286, which have more bits for addresses, nothing is changed, because the basic problem that existed in the 8086 still exists: the instructions themselves do not have any additional bits for addresses. You can argue that implicit in the register usage and type of the instructions are two bits for the selection of a segmentation register (and that is stretching it, since the register usage only provides 1 implicit address bit, while the type of instruction selects whether you are using the CS register, or whether the register usage will select DS or SS). Consequently, even by the most convoluted of thinking, your normal memory reference instructions on the 8086 and 80286 have only 18 address bits; and the size of the segmentation registers, which is one of the major improvements in the 286, doesn't help this problem at all. Certainly having memory-management on-chip doesn't. The 80286 does have some considerable instruction set improvements over the 8086; but it is the bit representation of these instructions that leads to the problems. [If you really want an appreciation for the complexity of the instruction set, try designing an assembler for it! Even when you think you understand the instruction encoding, you may suddenly discover that there are two instructions that don't quite fit...] -- Full-Name: J. Eric Roskos UUCP: ..!{decvax,ucbvax,ihnp4}!vax135!petsd!peora!jer US Mail: MS 795; Perkin-Elmer SDC; 2486 Sand Lake Road, Orlando, FL 32809-7642 "V'z bss gb gur Orezbbgurf, gb jngpu gur bavbaf na' gur rryf!" [Jryy, jbhyq lbh oryvrir Arj Wrefrl?]