Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.2 9/18/84; site peregrine.UUCP
Path: utzoo!utcs!lsuc!pesnta!pertec!peregrine!mike
From: mike@peregrine.UUCP (Mike Wexler)
Newsgroups: net.arch,net.micro,net.micro.pc,net.micro.68k
Subject: Re: Re: Re: Re: Re: Need 286 "C" benchmark
Message-ID: <130@peregrine.UUCP>
Date: Tue, 11-Jun-85 15:07:10 EDT
Article-I.D.: peregrin.130
Posted: Tue Jun 11 15:07:10 1985
Date-Received: Wed, 12-Jun-85 10:22:23 EDT
References: <426@oakhill.UUCP> <8745@microsoft.UUCP>
Organization: Peregrine Systems, Irvine, Ca
Lines: 9
Xref: utcs net.arch:1354 net.micro:10410 net.micro.pc:4190 net.micro.68k:898

Can someone tell me what the advantages of a segmented architechture is over
an equally efficient architechture based on "traditional" memory management.
Are these advantages worth the cost in both chip space and program complexity?
-- 
--------------------------------------------------------------------------------
Mike Wexler(trwrb!pertec!peregrine!mike) | Send all flames to:
15530 Rockfield, Building C              |	trwrb!pertec!peregrine!nobody
Irvine, Ca 92718                         | They will then be given the 
(714)855-3923                            | consideration they are due.