Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.3 alpha 4/15/85; site amdcad.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!amdcad!bcase From: bcase@amdcad.UUCP (Brian case) Newsgroups: net.arch,net.micro Subject: A feature, not a bug Message-ID: <1680@amdcad.UUCP> Date: Wed, 19-Jun-85 11:11:04 EDT Article-I.D.: amdcad.1680 Posted: Wed Jun 19 11:11:04 1985 Date-Received: Thu, 20-Jun-85 10:25:25 EDT Organization: AMDCAD, Sunnyvale, CA Lines: 20 Keywords: 32-bit microprocessor Xref: watmath net.arch:1433 net.micro:10820 I read the following in the "WE 32100 Microprocessor Information Manual" section 3.6.6 Stack and Miscellaneous Instructions: If an instruction, other than a conditional transfer, reads the PSW, the assembler m32as inserts a NOP before that instruction. This allows time for the PSW codes to settle before the new instruction tries to access them. Ahem. Allows the codes to settle? Don't they need to settle before the conditional transfer can reliably take place? Oh well, not a very big bug because explicit access of the PSW should be rare in user code, but come on guys, be honest! It's a bug! :-) bcase Ok, now look. The views stated here are only those of a few brain cells that worked correctly yesterday but are probably dead by today anyway. They don't possibly represent the views of anyone I work for or ever worked for.