Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site callan.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!genrad!decvax!tektronix!hplabs!pesnta!pertec!scgvaxd!wlbr!callan!tim From: tim@callan.UUCP (Tim Smith) Newsgroups: net.micro.68k Subject: Re: 68020 benchmarks?? (disbelieve Intel) Message-ID: <1012@callan.UUCP> Date: Tue, 4-Jun-85 16:16:47 EDT Article-I.D.: callan.1012 Posted: Tue Jun 4 16:16:47 1985 Date-Received: Sun, 9-Jun-85 01:57:32 EDT References: <155@soph.UUCP> Organization: Callan Data Systems, Westlake Village, CA Lines: 31 [ He is talking about 1K block transfers ] > My numbers, using the fastest block move instructions possible: > Intel family processors: > 8088, 4.77 MHz 130 copies/sec > 8086, 8 MHz 260 copies/sec > 80286, 6 MHz 450 copies/sec (real mode) > Motorola ones: > 68000, 12 MHz 340 copies/sec (SLOW block move loop) > 68010, 10 MHz 425 copies/sec . . > No wait states except on the 68000, so far as I know. Yes, this gives I tried this on my 10Mhz 68010 with no wait states. I used two functions, blt( src, dst, count ) and wblt( src, dst, count ). The first copies 'count' bytes from *src to *dst. The second copies 'count'/2 words from *src to *dst, with src and dst assumed even. They were timed from a C program that called each one 5000 times. Here are my results: 68010, 10Mhz ~650 copies/sec ( arbitrary buffers ) 68010, 10Mhz ~1600 copies/sec ( word aligned buffers ) Note that I am probably note using the fastes block transfer. I am just using a dbra loop, and letting the 68010 go into 'loop mode'. Are you SURE you don't have wait states? ps: the above times agree with what the instruction timings in the back of the book say! something must be wrong... :-)