Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/5/84; site sjuvax.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!whuxlm!whuxl!houxm!ihnp4!mhuxn!mhuxr!ulysses!allegra!sjuvax!jss From: jss@sjuvax.UUCP (J. Shapiro) Newsgroups: net.arch,net.micro.68k Subject: Re: Re: M680*0 "small model" Message-ID: <1178@sjuvax.UUCP> Date: Sat, 22-Jun-85 01:58:01 EDT Article-I.D.: sjuvax.1178 Posted: Sat Jun 22 01:58:01 1985 Date-Received: Sun, 23-Jun-85 04:33:08 EDT References: <167@mot.UUCP> <1069@peora.UUCP> <1071@peora.UUCP> <2312@sun.uucp> Organization: Haverford College, Haverford, Pa. Lines: 21 Xref: watmath net.arch:1454 net.micro.68k:952 "This" referring to address shrinking of span dependent code: > Heck, guys, the UNIX PDP-11 assembler does this for branch instructions. So > does the UNIX VAX-11 assembler and the MIT and AT&T 68000 assemblers. > > Guy Harris Not quite right, Guy. As I understood it, the Perkin Elmer assembler was described as doing an essentially arbitrary number of passes. With UNIX it was decided that this approach was too slow, and that the break point of cost effectiveness was at two passes, which catches about 80 percent of such things. the PDP-11 compilers and the VAX compilers both make only two passes. You are correct that they will replace jump/branch as appropriate. This is essentially an extension of the concept of span dependent optimization of addressing modes. I recently went off and looked into all of this, which is how I learned. Jon Shapiro