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Posting-Version: version B 2.10.2 9/18/84; site wateng.UUCP
Path: utzoo!watmath!wateng!ppavlik
From: ppavlik@wateng.UUCP (Petr Pavlik)
Newsgroups: net.micro.apple
Subject: CMP/60 critical timing during boot
Message-ID: <2477@wateng.UUCP>
Date: Wed, 5-Jun-85 10:06:57 EDT
Article-I.D.: wateng.2477
Posted: Wed Jun  5 10:06:57 1985
Date-Received: Thu, 6-Jun-85 00:24:57 EDT
Distribution: net
Organization: U of Waterloo, Ontario
Lines: 12

Has anybody had timing problems using the CP/M Softcard?  I have
built the II+ revision RFI clone and have full documentation for
both motherboard and Softcard.  Whether CP/M 60 boots or not
depends on tolerances of many chips on the: motherboard, +16k,
Softcard, and even VIDEX card.  Some configurations work.  The
problem occurs while booting, it is hard to trace anything.
Some people say, that the Softcard has a critical timing.  Does
anybody know what measurable signal is critical, or has anybody
had a similar experience?
-- 
	Peter Pavlik  (U of Waterloo VLSI Group, Waterloo Ont.)
	{allegra,clyde,decvax,ihnp4,utzoo}!watmath!wateng!ppavlik